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MC10EP101, MC100EP101 3.3V / 5V ECL Quad 4-Input OR/NOR
Description
The MC10/100EP101 is a Quad 4-input OR/NOR gate. The device is functionally equivalent to the E101. With AC performance faster than the E101 device, the EP101 is ideal for applications requiring the fastest AC performance available. The 100 Series contains temperature compensation.
Features
http://onsemi.com MARKING DIAGRAM*
* 250 ps Typical Propagation Delay * Maximum Frequency > 3 GHz Typical * PECL Mode Operating Range: VCC = 3.0 V to 5.5 V * * *
with VEE = 0 V NECL Mode Operating Range: VCC = 0 V with VEE = -3.0 V to -5.5 V Open Input Default State Pb-Free Packages are Available*
MCxxx EP101 AWLYYWWG LQFP-32 FA SUFFIX CASE 873A
1
1
32
QFN32 MN SUFFIX CASE 488AM
MCxxx EP101 AWLYYWWG G
xxx = 10 or 100 A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week G or G = Pb-Free Package (Note: Microdot may be in either location) *For additional marking information, refer to Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet.
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
(c) Semiconductor Components Industries, LLC, 2006
November, 2006 - Rev. 11
1
Publication Order Number: MC10EP101/D
MC10EP101, MC100EP101
D0d D1a D1b D1c D1d D2a D2b D2c VCC VCC Q0 24 D0c D0b D0a VEE Q0 Q0 VCC VCC 25 26 27 28 29 30 31 32 1 2 3 4 5 6 7 8 23 22 21 20 19 18 17 16 15 14 D2d VCC D3a D3b VCC D3c D3d VEE NC Q1 Q1 Q2 Q2 Q3 Q3 VCC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 Q0 VEE D0a D0b D0c 29 28 27 26 25 24 D0d 23 D1a 22 D1b
MC10EP101 MC100EP101
13 12 11 10 9
MC10EP101 MC100EP101
21 D1c 20 D1d 19 D2a 18 D2b 17 D2c
NC VEE D3d D3c VCC D3b D3a D2d VCC Q1 Q1 Q2 Q2 Q3 Q3 VCC
Warning: All VCC and VEE pins must be externally connected to Power Supply to guarantee proper operation.
Figure 2. 32-Lead QFN Pinout (Top View)
Figure 1. 32-Lead LQFP Pinout (Top View) Table 1. PIN DESCRIPTION
PIN D0a*-D3d* Q0-Q3, Q0-Q3 VCC VEE NC EP for QFN-32, only FUNCTION ECL Data Inputs ECL Data Outputs Positive Supply Negative Supply No Connect The Exposed Pad (EP) on the QFN-32 package bottom is thermally connected to the die for improved heat transfer out of package. The exposed pad must be attached to a heat- sinking conduit. The pad is electrically connected to VEE.
D0a D0b D0c D0d D1a D1b D1c D1d D2a D2b D2c D2d D3a D3b D3c Q3 Q3 Q2 Q2 Q1 Q1 Q0 Q0
* Pins will default LOW when left open.
Table 2. TRUTH TABLE
Dna L H X X X H Dnb L X H X X H Dnc L X X H X H Dnd L X X X H H Qn L H H H H H Qn H L L L L L
D3d VEE
Figure 3. Logic Diagram
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2
MC10EP101, MC100EP101
Table 3. ATTRIBUTES
Characteristics Internal Input Pulldown Resistor Internal Input Pullup Resistor ESD Protection Human Body Model Machine Model Charged Device Model Pb Pkg Level 2 Value 75 kW N/A > 4 kV > 100 V > 2 kV Pb-Free Pkg Level 2 Level 1
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) LQFP-32 QFN-32 Flammability Rating Transistor Count Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. Oxygen Index: 28 to 34
UL-94 V-0 @ 0.125 in 173 Devices
Table 4. MAXIMUM RATINGS
Symbol VCC VEE VI Iout IBB TA Tstg qJA qJC qJA qJC Tsol Parameter PECL Mode Power Supply NECL Mode Power Supply PECL Mode Input Voltage NECL Mode Input Voltage Output Current VBB Sink/Source Operating Temperature Range Storage Temperature Range Thermal Resistance (Junction-to-Ambient) Thermal Resistance (Junction-to-Case) Thermal Resistance (Junction-to-Ambient) Thermal Resistance (Junction-to-Case) Wave Solder Pb Pb-Free 0 lfpm 500 lfpm Standard 0 lfpm 500 lfpm 2S2P 32 LQFP 32 LQFP 32 LQFP QFN-32 QFN-32 QFN-32 Condition 1 VEE = 0 V VCC = 0 V VEE = 0 V VCC = 0 V Continuous Surge VI VCC VI VEE Condition 2 Rating 6 -6 6 -6 50 100 0.5 -40 to +85 -65 to +150 80 55 12 to 17 31 27 12 265 265 Unit V V V V mA mA mA C C C/W C/W C/W C/W C/W C/W C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
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3
MC10EP101, MC100EP101
Table 5. 10EP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 2)
-40C Symbol IEE VOH VOL VIH VIL IIH IIL Characteristic Power Supply Current Output HIGH Voltage (Note 3) Output LOW Voltage (Note 3) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Input HIGH Current Input LOW Current -150 Min 45 2165 1365 2090 1365 Typ 57 2290 1490 Max 75 2415 1615 2415 1690 150 -150 Min 45 2230 1430 2155 1460 25C Typ 58 2355 1555 Max 75 2480 1680 2480 1755 150 -150 Min 45 2290 1490 2215 1490 85C Typ 59 2415 1615 Max 75 2540 1740 2540 1815 150 Unit mA mV mV mV mV mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 2. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to -2.2 V. 3. All loading with 50 W to VCC - 2.0 V.
Table 6. 10EP DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 4)
-40C Symbol IEE VOH VOL VIH VIL IIH IIL Characteristic Power Supply Current Output HIGH Voltage (Note 5) Output LOW Voltage (Note 5) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Input HIGH Current Input LOW Current -150 Min 45 3865 3065 3790 3065 Typ 57 3990 3190 Max 75 4115 3315 4115 3390 150 -150 Min 45 3930 3130 3855 3130 25C Typ 58 4055 3255 Max 75 4180 3380 4180 3455 150 -150 Min 45 3990 3190 3915 3190 85C Typ 59 4115 3315 Max 75 4240 3440 4240 3515 150 Unit mA mV mV mV mV mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 4. Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to -0.5 V. 5. All loading with 50 W to VCC - 2.0 V.
Table 7. 10EP DC CHARACTERISTICS, NECL VCC = 0 V, VEE = -5.5 V to -3.0 V (Note 6)
-40C Symbol IEE VOH VOL VIH VIL IIH IIL Characteristic Power Supply Current Output HIGH Voltage (Note 7) Output LOW Voltage (Note 7) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Input HIGH Current Input LOW Current -150 Min 45 -1135 -1935 -1210 -1935 Typ 57 -1010 -1810 Max 75 -885 -1685 -885 -1610 150 -150 Min 45 -1070 -1870 -1145 -1870 25C Typ 58 -945 -1745 Max 75 -820 -1620 -820 -1545 150 -150 Min 45 -1010 -1810 -1085 -1810 85C Typ 59 -885 -1685 Max 75 -760 -1560 -760 -1485 150 Unit mA mV mV mV mV mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 6. Input and output parameters vary 1:1 with VCC. 7. All loading with 50 W to VCC - 2.0 V.
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MC10EP101, MC100EP101
Table 8. 100EP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 8)
-40C Symbol IEE VOH VOL VIH VIL IIH IIL Characteristic Power Supply Current Output HIGH Voltage (Note 9) Output LOW Voltage (Note 9) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Input HIGH Current Input LOW Current -150 Min 40 2155 1355 2075 1355 Typ 55 2280 1480 Max 75 2405 1605 2420 1675 150 -150 Min 40 2155 1355 2075 1355 25C Typ 58 2280 1480 Max 75 2405 1605 2420 1675 150 -150 Min 45 2155 1355 2075 1355 85C Typ 60 2280 1480 Max 85 2405 1605 2420 1675 150 Unit mA mV mV mV mV mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 8. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to -2.2 V. 9. All loading with 50 W to VCC - 2.0 V.
Table 9. 100EP DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 10)
-40C Symbol IEE VOH VOL VIH VIL IIH IIL Characteristic Power Supply Current Output HIGH Voltage (Note 11) Output LOW Voltage (Note11) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Input HIGH Current Input LOW Current -150 Min 40 3855 3055 3775 3055 Typ 58 3980 3180 Max 75 4105 3305 4120 3375 150 -150 Min 40 3855 3055 3775 3055 25C Typ 61 3980 3180 Max 75 4105 3305 4120 3375 150 -150 Min 45 3855 3055 3775 3055 85C Typ 64 3980 3180 Max 85 4105 3305 4120 3375 150 Unit mA mV mV mV mV mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 10. Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to -0.5 V. 11. All loading with 50 W to VCC - 2.0 V.
Table 10. 100EP DC CHARACTERISTICS, NECL VCC = 0 V, VEE = -5.5 V to -3.0 V (Note 12)
-40C Symbol IEE IEE VOH VOL VIH VIL IIH IIL Characteristic Power Supply Current VCC = -3.3V VCC = -5.0 V Power Supply Current Output HIGH Voltage (Note 13) Output LOW Voltage (Note 13) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Input HIGH Current Input LOW Current -150 Min 40 40 50 -1145 -1945 -1225 -1945 Typ 55 58 63 -1020 -1820 Max 75 75 80 -895 -1695 -880 -1625 150 -150 Min 40 40 55 -1145 -1945 -1225 -1945 25C Typ 58 61 67 -1020 -1820 Max 75 75 85 -895 -1695 -880 -1625 150 -150 Min 45 45 60 -1145 -1945 -1225 -1945 85C Typ 60 64 70 -1020 -1820 Max 85 85 88 -895 -1695 -880 -1625 150 Unit mA mA mV mV mV mV mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 12. Input and output parameters vary 1:1 with VCC. 13. All loading with 50 W to VCC - 2.0 V.
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MC10EP101, MC100EP101
Table 11. AC CHARACTERISTICS VCC = 0 V; VEE = -3.0 V to -5.5 V or VCC = 3.0 V to 5.5 V; VEE = 0 V (Note 14)
-40C Symbol fmax tPLH, tPHL tSKEW tJITTER tr tf Characteristic Maximum Frequency (See Figure 4. Fmax/JITTER) Propagation Delay D to Q, Q 10 100 125 180 Min Typ >3 Max Min 25C Typ >3 Max Min 85C Typ >3 Max Unit GHz ps 225 280 15 0.2 Q, Q 100 150 325 380 50 200 <1 200 120 150 200 250 300 20 0.2 170 370 400 50 200 <1 220 150 170 250 300 320 20 0.2 190 420 450 50 200 <1 250 ps ps ps
Within Device Skew Q, Q Device to Device Skew (Note 15) Cycle-to-Cycle Jitter (See Figure 4. Fmax/JITTER) Output Rise/Fall Times (20% - 80%)
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 14. Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to VCC - 2.0 V. 15. Skew is measured between outputs under identical transitions. 1000 900 800 VOUTpp (mV) 700 600 500 400 300 200 100 0 10 9 8 7 6 5 4 3 (JITTER) 2 1 4000 5000 JITTER OUT ps (RMS)
0
1000
2000
3000
FREQUENCY (MHz)
Figure 4. Fmax/Jitter
Q Driver Device Q
Zo = 50 W
D Receiver Device
Zo = 50 W 50 W 50 W
D
VTT VTT = VCC - 2.0 V
Figure 5. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D - Termination of ECL Logic Devices.) http://onsemi.com
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EE EE
EEEEEEEEEEE EEEEEEEEEEE EEEEEEEEEEE
MC10EP101, MC100EP101
ORDERING INFORMATION
Device MC10EP101FA MC10EP101FAG MC10EP101FAR2 MC10EP101FAR2G MC100EP101FA MC100EP101FAG MC100EP101FAR2 MC100EP101FAR2G MC10EP101MNG MC10EP101MNR4G MC100EP101MNG MC100EP101MNR4G QFN-32 (Pb-Free) Package LQFP-32 LQFP-32 (Pb-Free) LQFP-32 LQFP-32 (Pb-Free) LQFP-32 LQFP-32 (Pb-Free) LQFP-32 LQFP-32 (Pb-Free) Shipping 250 Units / Tray 250 Units / Tray 2000 / Tape & Reel 2000 / Tape & Reel 250 Units / Tray 250 Units / Tray 2000 / Tape & Reel 2000 / Tape & Reel 74 Units / Rail 1000 / Tape & Reel 74 Units / Rail 1000 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D AN1406/D AN1503/D AN1504/D AN1568/D AN1672/D AND8001/D AND8002/D AND8020/D AND8066/D AND8090/D - ECL Clock Distribution Techniques - Designing with PECL (ECL at +5.0 V) - ECLinPSt I/O SPiCE Modeling Kit - Metastability and the ECLinPS Family - Interfacing Between LVDS and ECL - The ECL Translator Guide - Odd Number Counters Design - Marking and Date Codes - Termination of ECL Logic Devices - Interfacing with ECLinPS - AC Characteristics of ECL Devices
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MC10EP101, MC100EP101
PACKAGE DIMENSIONS
32 LEAD LQFP CASE 873A-02 ISSUE C
32
A1
A
25
4X
0.20 (0.008) AB T-U Z
1
-T- B B1
8
-U- V V1
AE P AE
17
DETAIL Y
BASE METAL
9
S1 S
8X M_
R
J
G -AB-
SEATING PLANE
DETAIL AD CE
SECTION AE-AE
-AC- 0.10 (0.004) AC 0.250 (0.010) H W X DETAIL AD
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DATUM PLANE -AB- IS LOCATED AT BOTTOM OF LEAD AND IS COINCIDENT WITH THE LEAD WHERE THE LEAD EXITS THE PLASTIC BODY AT THE BOTTOM OF THE PARTING LINE. 4. DATUMS -T-, -U-, AND -Z- TO BE DETERMINED AT DATUM PLANE -AB-. 5. DIMENSIONS S AND V TO BE DETERMINED AT SEATING PLANE -AC-. 6. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE PROTRUSION IS 0.250 (0.010) PER SIDE. DIMENSIONS A AND B DO INCLUDE MOLD MISMATCH AND ARE DETERMINED AT DATUM PLANE -AB-. 7. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. DAMBAR PROTRUSION SHALL NOT CAUSE THE D DIMENSION TO EXCEED 0.520 (0.020). 8. MINIMUM SOLDER PLATE THICKNESS SHALL BE 0.0076 (0.0003). 9. EXACT SHAPE OF EACH CORNER MAY VARY FROM DEPICTION.
K
Q_
GAUGE PLANE
DIM A A1 B B1 C D E F G H J K M N P Q R S S1 V V1 W X
MILLIMETERS MIN MAX 7.000 BSC 3.500 BSC 7.000 BSC 3.500 BSC 1.400 1.600 0.300 0.450 1.350 1.450 0.300 0.400 0.800 BSC 0.050 0.150 0.090 0.200 0.450 0.750 12_ REF 0.090 0.160 0.400 BSC 1_ 5_ 0.150 0.250 9.000 BSC 4.500 BSC 9.000 BSC 4.500 BSC 0.200 REF 1.000 REF
INCHES MIN MAX 0.276 BSC 0.138 BSC 0.276 BSC 0.138 BSC 0.055 0.063 0.012 0.018 0.053 0.057 0.012 0.016 0.031 BSC 0.002 0.006 0.004 0.008 0.018 0.030 12_ REF 0.004 0.006 0.016 BSC 1_ 5_ 0.006 0.010 0.354 BSC 0.177 BSC 0.354 BSC 0.177 BSC 0.008 REF 0.039 REF
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8
0.20 (0.008)
9
-Z-
0.20 (0.008) AC T-U Z
F
D
M
4X
EE EE EE EE
N
AC T-U Z
DETAIL Y
-T-, -U-, -Z-
MC10EP101, MC100EP101
PACKAGE DIMENSIONS
QFN32 5*5*1 0.5 P CASE 488AM-01 ISSUE O
D A B
NOTES: 1. DIMENSIONS AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30 MM TERMINAL 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. MILLIMETERS MIN NOM MAX 0.800 0.900 1.000 0.000 0.025 0.050 0.200 REF 0.180 0.250 0.300 5.00 BSC 2.950 3.100 3.250 5.00 BSC 2.950 3.100 3.250 0.500 BSC 0.200 --- --- 0.300 0.400 0.500
2X 2X
0.15 C 0.15 C 0.10 C
32 X
0.08 C L
32 X 9 8
1 32 X b 0.10 C A B 32 25
0.05 C BOTTOM VIEW
32 X
ECLinPS is a trademark of Semiconductor Components INdustries, LLC (SCILLC).
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative
EE EE
TOP VIEW SIDE VIEW D2
16 17
PIN ONE LOCATION
E
(A3) A A1 C
EXPOSED PAD 32 X SEATING PLANE
DIM A A1 A3 b D D2 E E2 e K L
K
SOLDERING FOOTPRINT*
5.30 3.20
E2
24 32 X
0.63 e 3.20 5.30
0.28
0.50 PITCH
28 X
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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9
MC10EP101/D

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